P4 Workshop 2016

In cooperation with Ericsson our team from Eötvös Loránd University, Budapest, Hungary works on a P4 compiler that separates the hardware specific and hardware independent program functionalities. According to this design, the core compiler generates a target independent core program that relies on a target-specific hardware abstraction library representing an abstraction layer between the actual hardware and the P4 program. This design enables us to switch to a new hardware without writing a new P4 compiler and recompiling the original P4 program, since the core program always remains the same and the underlying target-specific library will only be changed. In this talk, we will present the current status of our target independent core compiler, the challenges we faced during the development, an Intel DPDK-based implementation of the hardware abstraction library and the performance test results. According to the first experiments, our DPDK-based L2 switch compiled from a P4 code can reach 9.1 Gbps forwarding rate on a single core setup with 10 Gbps line cards and Ethernet probe packets of 64 bytes. The testbed preparation for 40 Gbps and other more complex scenarios is on going.